Drive circuitry for display tubes

ABSTRACT

Apparatus for limiting the current, applied to the anodes of a data display system of the type comprising data display tubes having a single anode and a plurality of cathodes, to a constant level when the display tubes are energized as described. The emitter-collector terminals of a current control transistor are connected between an anode voltage source and the anodes of each of the display tubes. The base terminals of the transistors are connected to a voltage limiting zener diode which is biased by the anode voltage source. The zener diode limits the voltage which can be applied to the base of each transistor thereby limiting the current that can flow through each transistor. The base terminals of the transistors are also connected to a control system which controls when a particular anode transistor is to conduct current.

United States Patent [72] Inventor Julius Cluck Stamford, Conn. 21 Appl.No. 724,197 [22] Filed Apr. 25. 1968 [45] Patented July 20, 1971 [73]Assignee Sperry Rand Corporation New York, N.Y.

(54] DRIVE ClRCUlTRY FOR DISPLAY TUBES 8 Claims, 3 Drawing Figs.

52 U.S.Cl 340/324, 307/223, 340/336 [51] Int. Cl G09f 9/40 [50] Fieldol'Search 340/324, 336; 3 l5/84.6; 307/223 [56] References Cited UNITEDSTATES PATENTS 2,664,555 12/1953 Thomas et a1. 315/84.6 3,213,37410/1965 Hawley 3l5/84.6 3,307,171 2/1967 Claessen 315/846 flea/v (awn/vcom/r 05:00:?

FROM MEMORY REGISTER 3,395,268 7/1968 Barton ABSTRACT: Apparatus forlimiting the current, applied to the anodes of a data display system ofthe type comprising data display tubes having a single anode and aplurality of cathodes, to a constant level when the display tubes areenergized as described. The emitter-collector terminals of a currentcontrol transistor are connected between an anode voltage source and theanodes of each of the display tubes. The base terminals of thetransistors are connected to a voltage limiting zener diode which isbiased by the anode voltage source. The zener diode limits the voltagewhich can be applied to the base of each transistor thereby limiting thecurrent that can flow through each transistor. The base terminals of thetransistors are also connected to a control system which controls when aparticular anode transistor is to conduct current.

L l m PATENTED M20 I97] SHEET 2 OF 2 DRIVE CHRCUETRY lFQlh DliSlPlLAYTUBES BACKGROUND OF THE lNVENTlON Systems for displaying data readout"from computer registers or other data sources are well known. The datasource is connected by drive circuitry to an indicia display tube suchas a Nixie (registered TM of the Burroughs Corporation) tube. The drivecircuitry energizes the appropriate cathode of the display tube so thatthe desired indicia is displayed. Normally, a plurality of display tubesare provided, and the drive circuit drives all of the tubes so that acomposition indicia display is presented for viewing.

Prior art drive circuits have taken several forms, generally, the anodesof the display tubes have been directly connected to a source ofpotential. The plural electrodes of the tubes have been connected bycontrol circuits to the data source. When a data signal occurs, one ofthe control circuits is energized and causes an indicia display on theface of the tube connected to that control circuit. if desired, eachtube of a plurality of tubes can be controlled so as to display indiciain a sequential order until a composite data indicia display ispresented for viewing.

The major disadvantage of prior art drive circuits is their requirementthat the anode voltage be high and stable. That is, for successfuloperation the anodes must be connected to a stable source of highvoltage. If the voltage of the source is not sufficiently wellregulated, excessive anode currents occur and reduce the life of thetube. Alternatively, if low currents occur, the light intensity of thedisplay tubes is reduced to an undesirable low level. Because the anodevoltage must be high and well regulated, a sophisticated regulatingcircuit connecting the anodebias source (if the source is unregulated)to the anode is required. Alternatively, a sophisticated regulatingcircuit may be included in the bias source per se.

in addition to the foregoing disadvantage, prior art drive circuits havefurther disadvantages. Specifically, the high voltage anode bias ordrive circuit and, high voltage components are generally more expensivethan lower voltage components. In

addition, because many prior art drive circuits include DC rather thanAC coupling, the display tubes of prior art systems can turn on" anddraw excessive current. The excessive current may damage either thedisplay tubes or their drive circuitry if there is a fault in the systempreceding the drive circuitry.

Therefore, it is an object of this invention to provide a new andimproved drive circuit for an indicia display system.

it is also an objectof this invention to provide a constant currentanode circuit for use in display tube drive circuitry that operates froman unregulated voltage source.

It is another object of this invention to provide a new and improveddrive circuit suitable for driving a plurality of display tubes from anunregulated anode voltage supply.

SUMMARY OF THE INVENTION In accordance with a principal of thisinvention an electronic drive circuit for an indicia display tube systemis provided/Each tube includes a plurality of cathodes for controllingthe displaying of a plurality of indicia and a single anode. A pluralityof cathode control means are connected to the cathodes of the tube in apredetermined manner, and an anode control means isconnected to theanode of the tube. The plurality of cathode control means are connectedto a source of data, such as the memory register of a computer so thatdata information signals control the indicia display of the tubes. Theanode control means is connected to a decoder,

and the decoder is connected to a counter. The decoder decodes theoutput from the counter and energizes the anode of the display tube whena particular code is generated by the counter. Hence, the data sourceprovides a data signal that determines what indicia is to be displayedand the decoder determines when the tube will display that indicia.

In accordance with another principal of the invention, the

of the tube. That'is, the current driving the anode is constantregardless of voltage fluctuations. Hence, the life of the tube is notreduced because of the occurrence of overcurrent conditions, nor is theintensity of the display reduced because of undercurrent conditions.These conditions cannot occur becausethe anode current is constant eventhough the source voltage changes.

ln accordance with still another principle of the invention, the anodecontrol means comprises a relatively low voltage transistor connectedbetween the source of potential and the anode of the display tube so asto apply constant current to the tube when the transistor is triggeredon. The base of the transistor is connected through an AC couplingnetwork to the output of the decoder.

it will be appreciated by those skilled in the art and others that theinvention is a rather uncomplicated circuit for driving a display tubesystem. The output from a data source determines which element of thedisplay tube indicia elements is to be ignited. The output from thedecoder determines when the tube is to display the indicia.Alternatively, the output of the decoder could determine which tube of aplurality of tubes is to display the indicia. in addition to controllingthe display, the invention provides an anode control means that appliesa constant current to the anodes of the tubes to prevent either anovercurrent or an undercurrent condition. An overcurrent conditionreduces the life of a tube while an undercurrent condition reduces theintensity of the indicia displayed by a tube. Moreover, the sourcevoltage can be lower in potential than prior art source voltages and, itcan fluctuate. A lower source voltage allows the use of lower voltagecomponents in the anode control circuit. And, lower voltage componentsare more economical than higher voltage components. Finally,

because AC coupling is provided, the display tubes will drop out ifthere is a failure in the decoder circuit or the circuits preceding thedecoder. Hence, the invention generally provides improved circuit fordriving a display tube system that is uncomplicated and economical.

BRIEF DESClRlPTlON OF THE DRAWlNGS DESCRllPTlON QF THE PREFERREDEMBODlMENTS Turning now to the drawings wherein like reference numeralsdesignate like parts throughout the several views, FIG. I is a blockdiagram illustrating a display system using the invention. The systemillustrated in FIG. 1 comprises a column control counter 11!, a columncount decoder 13, a display and display drive l5, and a recirculatingmemory register 17. The output from the column control counter 11 isconnected to the input of the column count decoder 113, and the outputfrom the column count decoder is connected to one input of the displayand display drive 15. The sync line 19 is connected between the columncontrol counter ill and the memory register l7.

' The column control counter 11 generates a parallel control signal on aplurality of lines. Preferably, this signal is an excess-3 binarysignal, hence, it is a 4-bit code signal. The column count decoder l3decodes the control signal from the column control counter and generatesa single control signal. The single control signal is related to theparticular parallel code signal submitted by the column control counterand is applied to the display drive 15. This signal, as hereinafterdescribed, controls which tube of a plurality of display tubes displaysa particular indicia. For purposes of description, all indicia arenumerical indicia ranging from to 9. Hence, numerical signals aredisplayed on the display tubes.

The memory register 17 generates a signal that determines which indiciaofa plurality ofindicia will be displayed on the tube selected by thecolumn count decoder signal. The memory register may be the memoryregister of a computer, or any other similar data storage source. Thesync line 19 merely provides a sync signal between the column controlcounter and the memory register so that the tube selection signal fromthe column count decoder is in synchronism with the indicia selectionsignal from the memory register. Generally speaking, signalsrepresenting a multidigit number recirculate in the memory register. Ateach recirculation a different display tube is activated. Therefore, todisplay all the tubes there must be as many circulations as the numberof tubes. The digits are displayed repeatedly, but because of thefrequency of display, they appear to the eye to be constantly displayed.

FIG. 2 illustrates the display drive circuit of the invention and issuitable for use in the system illustrated in FIG I. For purposes ofclarity, FIG. 2 is only a partial schematic diagram. That is, FIG. 2only illustrates four display tube circuits 23, four anode controlcircuits 2], four cathode control circuits 25, and a single decimalpoint control circuit 27. However, the drive circuit illustrated in FIG.2 can be expanded to control as many display tubes as desired. Inaccordance with the column count decoder illustrated in FIG. 3 andhereinafter described, a lO-tube system is contemplated by theembodiment of the invention herein described. But, as stated above, onlyfour of the tubes are illustrated in FIG. 2; the remainder of the tubesand their control circuits are identical to those illustrated.

Each anode control circuit 21 comprises: a PNP transistor designated 0,;first and second resistors designated R, and R a capacitor designatedC,; and, a diode designated D,. R, is connected between the emitter andthe base of Q,. The base of Q, is also connected to one side of C, andto the cathode of D,. The other side of C, is connected through R to abias source designated V,. The junction between C, and R is connected toan input terminal 29, said input terminal being connected to one of theoutputs of the column count decoder as hereinafter described.

Each display tube circuit 23 comprises a display tube (such as a Nixietube) designated T having its anode connected to the collector of 0,.

Each cathode control circuit 25 comprises: a NPN transistor designatedQ,; a resistor designated R and, a three input NAND gate designated A,.The three inputs of A, are connected to the signal outputs of the memoryregister [7 illustrated in FIG. 1. The output of A, is connected to theemitter of Q The base of Q is connected through R, through a bias sourcedesignated V,. The collector of Q, is connected to the same numericalcathode terminal of all of the display tubes. Hence, when 0 of any oneof the cathode control circuits is energized, it applies power to acommon numerical cathode of each of the display tubes. As is well knownin the art, each cathode controls the energization of one of thenumerical indicia elements contained in the tube.

The decimal point control circuit 27 illustrated in FIG. 2 comprises: aNPN transistor designated 0,; a resistor designated R a rotary switchdesignated 8,; a simple switch designated 5,; and, a single input NANDgate designated A, Preferably, S, is a rotatable switch having a commonterminal connected to a wiper arm and a plurality of separate orindividual terminals adapted to be selectively contacted by the wiperarm. S is a simple open and close, single pole switch.

The input ofA, is connected through S to ground. The base of Q, isconnected through R, to a suitable bias source designated V,. Theemitter of Q, is connected to the output of A The collector Q, isconnected to the common terminal of S,. The individual terminals ofS,are connected to the decimal point indicia cathodes of the displaytubes. Hence, when S, is switched to a particular position, it willignite the decimal point indicia of the tube connected to that switchposition if S IS open.

The circuit illustrated in FIG. 2 also comprises three additionalresistors designated R R and R,; a plurality of tube diodes designated Da decimal point diode designated D;,; a pair of source diodes designatedD, and D,,; and a Zener diode designated DZ. One end of R, is connectedto the Q, emitters, and the other end of R is connected through R, to abias source designated V,. The junction between R, and R, is connectedthrough D D R and DZ connected in that order in series to ground. Theanodes of D, and D are nearest V and the anode of DZ is connected toground. The junction between D, and R, is connected to the anodes of thediodes D,. The anodes of the diodes D, are separately connected to thecollectors of the transistors Q of the cathode control circuits. Theanode of D is connected to the collector (1,. The cathodes of the diodesD and D are connected together and to the junction between R, and DZ.The junction between R, and DZ is also connected to a voltage terminaldesignated V With the transistor configuration illustrated in FIG. 2, itwiil be appreciated by those skilled in the art and others that allvoltage sources are positive and that the potential at voltage terminalV,, is positive. The main voltage source is V that is, V, is the largestvoltage source and other voltage sources necessary to operate thecircuit, can be derived from V,. For example, the voltage at terminal Vis derived from the voltage V,. The value of V, is determined by thevalue of DZ and, preferably, the V voltage is equal to the voltagerequirements of V,, and is connected thereto. The voltage requirementsof V V and V, are somewhat less than V,,, and can be derived by reducingthe V voltage to appropriate levels in a manner similar to thederivation of the V voltage.

The V voltage is, in prior art circuits, regulated prior to beingapplied to the anodes of the display tubes. However, in accordance withthis invention, V in unregulated. In fact, V can fluctuate 10 percent or15 percent of its nominal value. The reason V, can fluctuate is that itsfluctuations have no effect on the current operation of 0,. That is, D Dand D, provide a constant voltage across the Q, base-emitter electrodesand R, when Q, is pulsed. Because the Q, base-emitter voltage can beconsidered constant, the remaining voltage across R, and the currentthrough R, is also constant. Since most of the current passing through Rgoes into the emitter at Q,, the emitter current and, for all practicalpurposes, the collector current of Q,, are constant. More specifically,when Q, is pulsed on, it remains out of saturation with its currentcontrolled by the voltage across R This constant current is applied tothe display tubes T.

Because Q, provides a constant current to the display tubes T, they donot receive either an overcurrent or an undercurrent. It will beappreciated that an overcurrent would reduce the life of the displaytubes by destroying their elements while an undercurrent would reducethe intensity of the light emitted by the elements of the tubes.

It will also be appreciated that, because the constant current generatorcircuit R and Q, requires a voltage drop of only three diodes D,, D, andD,, V, need only be a small amount above the required tube potential.The voltage drop across R, can be essentially neglected because thatresistor is a low voltage resistor and is merely included to protect thecircuit from high current in the event of a Q, failure. Also, because V,is a lower voltage, Q, can be a lower voltage transistor than would berequired if V, were required to be larger.

Turning first to the operation of the decimal point circuit 27,essentially A, is an inverter, hence, if S, is closed, V, is applied tothe emitter of Q, and biases Q, off. If S is open, the emitter of Q, isgrounded and 0,, passes current. Therefore, if it is desired that adecimal point be included in the indicia to be displayed, S is opened.When S is opened, a decimal point is displayed on the display tube, T,connected to the individual contact intersecting the wiper arm of 5,. itshould be noted, that any tube, T, can display both a decimal point anda number at the same time. However, both displays will only occur whenthe anode is energized and the decimal point and number electrodes arealso energized. The decimal point electrode is energized as justdiscussed.

The numerical electrodes are energized by the memory register 17(FIG. 1) generating a binary code representing a numerical value. Thiscode is recognized by one of the A, gates. That gate grounds the emitterof its transistor Q When the emitter Q, is grounded, it is turned on andpasses current, and this current energizes one of the numericalelectrodes of all of the tubes. The same numerical electrode isenergized whether it be 0, l, 2 or any other number up to 9. The tubethat actually displays the number is determined by the energization ofthe anode control circuits.

'The tube anodes are energized by the output signals from the columncount decoder. The column count decoder applies a voltage to one of theterminals 29, the exact terminal being determined by the signals appliedto the column count decoder by the column control counter. The energizedterminal applies a voltage through its respective capacitor C, to itsrespective transistor (2,. This voltage energizes O, and its associateddisplay tube T. At this point both an electrode and the anode of aparticular display tube are energized, hence, that display tube displaysthe chosen number. in addition, if S, is coupled to the same displaytube and S is open, that display tube also displays a decimal point.

FIG. 3 illustrates a column count decoder suitable for use with theinvention and comprises NPN transistors designates Q, through Q ninediodes designated D through D,,; and eight resistors designated lRthrough R Eight input terminals are illustrated on the left of FIG. 3and are adapted to receive signals from the column control counter.Preferably, the column control counter generates a 4-bit binary code.The eight input terminals receive the 4-bit signals and the complementsof the 4-bit signals. For ease of discussion, the input terminals forthe 4-bit signals are designated in FIG. 3 as X, through X, and inputterminal for the complements are designated as X, through "X' Hence,each of the eight input terminals receives either an X or an 'Ksignal.

The X, terminal is connectedthrough lR, to the emitters of Q through 0,The X, terminal is connected through R to the emitters of Q through R isconnected in series with R, between the emitters of 0., through Q, andthe emitters of 0,, through Q The junction between R,, and R, isconnected to a bias source designated V The X, terminal is connected tothe cathodes of D, and D and the X terminal is connected to the cathodesD,, and D The X terminal is connected to the cathodes of D and D, andthe X terminal is connected to the cathodes of D-, and D The X, terminalis connected to the cathode of D The X, terminal is connected to thebases of Q, and Q,,. The anodes of D and D are connected to the bases ofQ and Q,,,. The anodes of D and D, are connected to the bases of Q,, and0,,. Similarly, the anodes of D and D are connected to the bases of Qand 0, and the anodes of D,, and D are connected to the bases of 0,, and0, The anode of D is connected to the bases of Q, and Q,,,.

The anodes of D, and D,, are also connected through R, to a voltagesource designated V The anodes of D,,, and D,, are connected through R,to V,,, and the anodes of D and D, are connected through R, to V Also,the anodes of D, and D are connected through R,, to V V and V,, are bothpositive for the transistor-diode polarity illustrated in Fig 3. Thecollectors of each of the transistors 0, through 0, are separatelyconnected to a plurality of output terminals that are adapted forconnection through the capacitors C, to thetransistors O, of the anodedrive circuits illustrated in FIG. 2.

The column count decoder merely decodes the signal from the columncontrol counter and applies sequential signals to its output terminals.The sequence of the output signals is determined by the sequence ofthecoded signal received from the column control counter.

The following is a table setting forth which transistor is on andgenerating an output signal for a particular binary sequence of inputsignals for the column count decoder illustrated in FIG. 3:

It is evident from the table that as the count in the column controlcounter advances from binary 0 to the binary equivalent of 9, the columncount decoder sequentially produces an output signal at each of its 10outputs. Because these output signals are connected to the anode controlcircuits 21 of the drive circuit illustrated in H6. 2, the anode controlcircuits are sequentially energized when the foregoing code sequence isapplied to the column count decoder by the column control counter. itwill be understood that the tube sequence is connected so that the tubesread from left to right to provide a number that can be viewed in theusual manner. After one sequence is complete, the column control countersenses the completion and recycles so that a continuous sequence ofcontrol signals is applied to the anode control circuits. Since thesignals from the memory register are repetitively applied to the gatesA, of F IG. 2 in synchronism with the signals from the memory register,it is evident that each display tube is repetitively energized. However,the rate of flicker is so great that it cannot be perceived by the humaneye.

it will be appreciated from the foregoing description of the inventionthat an uncomplicated apparatus for driving a plurality of display tubesis provided. A column control counter generates a code that is decodedby a column count decoder. The decoder applies sequential controlsignals to anode control circuits connected to the display tubes, thecontrol sequence being determined by the code signals applied to thedecoder by the counter. Hence, tube control is provided. In addition,indicia control data is "readout from a data source and controls theindicia electrodes of the tubes through an uncomplicated electrodecontrol circuit. Therefore, both indicia and tube control is provided.

Because the anode control circuits are a constant current source for theanodes of the tubes, the life of the tubes is not reduced nor is theintensity of the tubes indicia reduced. The anode current is constantregardless of fluctuations.

The invention also provides means for selectively adding a decimal pointto the indicia displayed on the tubes. That is, if the indicia arenumbers of a decimal point can be added if desired to point off" thenumber. And, the decimal point can be selectively inserted at any pointin the sequence of numbers.

While the foregoing disclosure has described a preferred embodiment ofthe invention, it will be appreciated thatcertain changes can be madewithin the scope of the invention. For example, NPN transistors can beplaced by PNP transistors and vice versa. Of course, appropriate biaschanges must be made, and the polarity of the diodes must be changed tocompensate for the transistor changes. In any event, the invention canbe practiced otherwise than as specifically described herein.

What is claimed is:

1. In a data display system that comprises a plurality of data displaytubes, each data display tube having at least one selectivelyenergizable anode and a plurality of selectively energizable cathodes,an apparatus for limiting the current applied to the selectivelyenergized anodes to a constant level when the anodes are energized, saidapparatus comprising:

a plurality of current control transistors, each of said current controltransistors having its emitter-collector terminals connected between ananode potential source and an anode of one of said plurality of datadisplay tubes, the base of each of said current control transistorsconnected so as to be selectively energizable by a control voltage andthereby control the selective energization of the anodes of saidplurality of data display tubes; and,

a single voltage limiting diode connected to the bases of all of saidplurality of current control transistors to limit the level of thecontrol voltage applied to the bases of said plurality of currentcontrol transistors to a constant level.

2. Apparatus as claimed in claim 1 wherein said voltage limiting diodeis a zener diode.

3. Apparatus as claimed in claim 2 wherein said current controltransistors are PNP transistors having their collectors directlyconnected to said anodes.

4. Apparatus as claimed in claim 3 including a plurality of diodes, oneof said plurality of diodes being connected between said zener diode andthe base of each of said plurality of PNP transistors; and including afurther diode connected between said anode potential source and saidzener diode.

5. Apparatus as claimed in claim 4 including a plurality of seriesconnected resistor-capacitor circuits, one of said circuits beingconnected to each of said plurality of PNP transistors so that the outerend of the resistor is connected to the emitter of the associated PNPtransistor, the junction between the resistor and capacitor is connectedto the base of the associated PNP transistor and the outer end of thecapacitor is connected to the control voltage that selectively energizesthe associated PNP transistor; and including a further resistorconnected between said anode potential source and the emitters of all ofsaid PNP transistors.

6. Apparatus as claimed in claim 1 wherein said current controltransistors are PNP transistors having their collectors directlyconnected to said anodes.

7. Apparatus as claimed in claim 1 including a plurality of diodes, oneof said plurality of diodes being connected between said voltagelimiting diode and the base of each of said plurality of current controltransistors; ,and including a further diode connected between said anodepotential source and said voltage limiting diode.

8. Apparatus as claimed in claim 1 including a plurality of seriesconnected resistor-capacitor circuits, one of said circuits beingconnected to each of said plurality of current control transistors sothat the outer end of the resistor is connected to the emitter of theassociated current control transistor, the junction between the resistorand capacitor is connected to the base of the associated current controltransistor and the outer end of the capacitor is connected to thecontrol voltage that selectively energizes the associated currentcontrol transistor; and including a further resistor connected betweensaid anode potential source and the emitters of all of said currentcontrol transistors, the collectors of said current control transistorsbeing directly connected to said anodes.

1. In a data display system that comprises a plurality of data displaytubes, each data display tube having at least one selectivelyenergizable anode and a plurality of selectively energizable cathodes,an apparatus for limiting the currenT applied to the selectivelyenergized anodes to a constant level when the anodes are energized, saidapparatus comprising: a plurality of current control transistors, eachof said current control transistors having its emitter-collectorterminals connected between an anode potential source and an anode ofone of said plurality of data display tubes, the base of each of saidcurrent control transistors connected so as to be selectivelyenergizable by a control voltage and thereby control the selectiveenergization of the anodes of said plurality of data display tubes; and,a single voltage limiting diode connected to the bases of all of saidplurality of current control transistors to limit the level of thecontrol voltage applied to the bases of said plurality of currentcontrol transistors to a constant level.
 2. Apparatus as claimed inclaim 1 wherein said voltage limiting diode is a zener diode. 3.Apparatus as claimed in claim 2 wherein said current control transistorsare PNP transistors having their collectors directly connected to saidanodes.
 4. Apparatus as claimed in claim 3 including a plurality ofdiodes, one of said plurality of diodes being connected between saidzener diode and the base of each of said plurality of PNP transistors;and including a further diode connected between said anode potentialsource and said zener diode.
 5. Apparatus as claimed in claim 4including a plurality of series connected resistor-capacitor circuits,one of said circuits being connected to each of said plurality of PNPtransistors so that the outer end of the resistor is connected to theemitter of the associated PNP transistor, the junction between theresistor and capacitor is connected to the base of the associated PNPtransistor and the outer end of the capacitor is connected to thecontrol voltage that selectively energizes the associated PNPtransistor; and including a further resistor connected between saidanode potential source and the emitters of all of said PNP transistors.6. Apparatus as claimed in claim 1 wherein said current controltransistors are PNP transistors having their collectors directlyconnected to said anodes.
 7. Apparatus as claimed in claim 1 including aplurality of diodes, one of said plurality of diodes being connectedbetween said voltage limiting diode and the base of each of saidplurality of current control transistors; and including a further diodeconnected between said anode potential source and said voltage limitingdiode.
 8. Apparatus as claimed in claim 1 including a plurality ofseries connected resistor-capacitor circuits, one of said circuits beingconnected to each of said plurality of current control transistors sothat the outer end of the resistor is connected to the emitter of theassociated current control transistor, the junction between the resistorand capacitor is connected to the base of the associated current controltransistor and the outer end of the capacitor is connected to thecontrol voltage that selectively energizes the associated currentcontrol transistor; and including a further resistor connected betweensaid anode potential source and the emitters of all of said currentcontrol transistors, the collectors of said current control transistorsbeing directly connected to said anodes.